1. Field of the Invention
The present invention relates to a method for etching semiconductor devices. More specifically, the present invention relates to a dry etching method capable of reducing the wiring dimension without causing defective pattern by reducing the processing dimension simultaneously while processing a material to be etched which is the wiring layer disposed on the semiconductor substrate.
2. Description of the Related Art
Recently, along with the advanced integration technology accompanying the increase in processing speed of semiconductor devices, there are increasing demands for enhancing the miniaturization processes in the field of gate material processing and the like. In the field of dry etching, generally in order to miniaturize the pattern, the photoresist pattern used as the mask is reduced in dimension via dry etching prior to processing the material to be etched, so as to reduce the processing dimension of the material to be etched.
Along with the further advancement of miniaturization, ArF resist has been adopted as the material for the photoresist mask capable of being exposed via an ArF laser, which is capable of forming a micropattern with higher accuracy. However, since ArF resist cannot be deposited as thick as the conventional mask members, and since ArF has a high etching rate, it has a property vulnerable to etching. Therefore, the ArF resist has a drawback in that the mask is removed during processing of the material to be etched, making it impossible to perform fine wiring process of the material to be etched with high accuracy. In order to overcome this problem, an inorganic film layer composed of SiON, SiN, SiO or the like is disposed between the photoresist mask and the material to be etched, wherein the inorganic film layer is processed via dry etching using a reduced photoresist mask pattern, according to which an inorganic film mask having a slow etching rate is formed to realize stable processing of the material to be etched. This technique is disclosed for example in Japanese patent application laid-open publication No. 9-237777 (patent document 1).
However, according to the method for reducing the photoresist pattern dimension via dry etching, it is necessary to ensure a photoresist mask thickness required for processing the inorganic film layer, so there is a limitation in the reduction thickness of the processing dimension.